Jpn. J. Appl. Phys. 30 (1991) pp. 3715-3718 |Next Article| |Table of Contents|
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A New Method to Estimate Grain Boundary Trap State Density in Poly-Si TFTs
Electronic Imaging and Devices Research Laboratory, Fuji Xerox Co., Ltd., 2274 Hongo, Ebina, Kanagawa 243-04
(Received September 7, 1991; accepted for publication November 16, 1991)
A new method of estimating grain boundary trap state density in poly-Si thin film transistors (TFTs) is proposed by modifying an assumption used in Levinson's method. Our method assumes that only the carrier near the surface contributes to the total current, and the other carrier is neglected. Then the carrier density at the surface is used to express the potential barrier height induced at the grain boundary instead of the averaged carrier density as in Levinson's method. The validity of our assumption is investigated using our two-dimensional device simulator, and it is shown that our assumption on the carrier density is suitable to derive the true trap state density.
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