Jpn. J. Appl. Phys. 45 (2006) pp. 2939-2944  |Previous Article| |Next Article|  |Table of Contents|
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Area-Selective Post-Deposition Annealing Process Using Flash Lamp and Si Photoenergy Absorber for Metal/High-k Gate Metal–Insulator–Semiconductor Field-Effect Transistors with NiSi Source/Drain

Takeo Matsuki, Isamu Nishimura, Yasushi Akasaka, Kiyoshi Hayashi, Masataka Noguchi, Koji Yamashita, Kazuyoshi Torii, Naoki Kasai^**** and Yasuo Nara

(Received September 30, 2005; revised November 30, 2005; accepted December 6, 2005; published online April 25, 2006)

We have proposed an area-selective post-deposition annealing (PDA) process that involves a combination of flash lamp annealing and the use of a Si photoenergy absorber (Si-PEA) for metal/high-k gate last metal–insulator–semiconductor field-effect transistors (MISFETs) with NiSi on source/drain (S/D). The process makes it possible to suppress the increase in both the sheet resistance and junction leakage current of NiSi S/D regions. This PDA process also showed optimality for silicide gate electrode formation with silicidation of part of the Si-PEA. It was found that the flash lamp PDA with Si-PEA on nickel–silicide/HfAlO_x/SiO₂ gate-last MISFETs reduced electron trapping at the gate dielectric and resulted in better PBTI immunity than conventional rapid thermal PDA and flash lamp PDA without Si-PEA.

URL: http://jjap.jsap.jp/link?JJAP/45/2939/
DOI: 10.1143/JJAP.45.2939

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