(Received September 14, 2005; accepted December 19, 2005; published online April 25, 2006)
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 µm, 3.3 V complementary metal–oxide–semiconductors (CMOS) process. The entire chip area is only 0.4 mm2. The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 µs over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.
KEYWORDS:lock-in speed, direct frequency presetting, mixed-signal voltage-controlled oscillator (VCO), phase-locked loop (PLL), synthesizer