Jpn. J. Appl. Phys. 45 (2006) pp. L920-L922 |Next Article| |Table of Contents|
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Express Letter
Monolithic Implementation of Elemental Devices for Optoelectronic Integrated Circuit in Lattice-Matched Si/III–V–N Alloy Layers
Yuzo Furukawa,
Hiroo Yonezu,
Yuji Morisaki,
Soo-Young Moon,
Seigi Ishiji and
Akihiro Wakahara
Department of Electrical and Electronic Engineering, Toyohashi University of Technology, Toyohashi, Aichi 441-8580, Japan
(Received July 22, 2006; accepted August 13, 2006; published online September 1, 2006)
Light emitting diodes (LEDs) and Si-based metal oxide semiconductor field effect transistors (MOSFETs) were monolithically merged in a single chip which consisted of a Si layer and an InGaPN/GaPN double heterostructure layer lattice-matched to Si grown on a Si substrate by dislocation-free growth process for the first time. The developed fabrication process was conformed to a conventional planar MOSFET process. All LEDs and MOSFETs operated normally. Light emission from the LED was modulated by switching the MOSFET. The growth and fabrication technologies could be effective for realizing monolithic optoelectronic integrated circuits for massively parallel processing and optical interconnections.
URL:
http://jjap.jsap.jp/link?JJAP/45/L920/
DOI: 10.1143/JJAP.45.L920
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