Jpn. J. Appl. Phys. 47 (2008) pp. 2752-2755 |Previous Article| |Next Article| |Table of Contents|
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(Received October 1, 2007; accepted November 1, 2007; published online April 25, 2008)
This paper provides a SiGe optical receiver using new high performance differential active Miller capacitor (DAMC) circuits to replace off-chip capacitors. The fully integrated design can avoid off-chip noise interference. The 4.25 Gbit/s optical receiver was realized in a commercial 0.35 µm SiGe BiCMOS process. The measured results of the receiver demonstrate a differential output swing of 530 mV with 50 Ω output loads, a crossing percentage of 51.6%, a peak-to-peak jitter (jitterp–p) of 23.9 ps, and an input sensitivity of -13.8 dBm, respectively, at a bit error rate (BER) of 10-12 with a 231-1 pseudo random binary sequences (PRBS) test pattern. The total circuit dissipates 105.6 mW under a 3.3 V supply, and the chip size is 945 ×980 µm2.
URL:
http://jjap.jsap.jp/link?JJAP/47/2752/
DOI: 10.1143/JJAP.47.2752