Jpn. J. Appl. Phys. 47 (2008) pp. 3428-3433  |Next Article|  |Table of Contents|
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Physical Mechanism of Buffer-Related Current Transients and Current Slump in AlGaN/GaN High Electron Mobility Transistors

Kazushige Horio and Atsushi Nakajima

Faculty of Systems Engineering, Shibaura Institute of Technology, 307 Fukasaku, Minuma-ku, Saitama 337-8570, Japan

(Received January 3, 2008; revised January 22, 2008; accepted February 4, 2008; published online May 16, 2008)

Two-dimensional transient analyses of AlGaN/GaN high electron mobility transistors (HEMTs) are performed in which a deep donor and a deep acceptor are considered in a buffer layer. Quasi-pulsed current–voltage (IV) curves are derived from the transient characteristics. When the drain voltage is raised abruptly, electrons are injected into the buffer layer and captured by deep donors, and when it is lowered abruptly, the drain currents remain at low values for some periods and begin to increase slowly as the deep donors begin to emit electrons, showing drain-lag behavior. The gate lag could also occur due to deep levels in the buffer layer, and it is correlated with relatively high source access resistance in AlGaN/GaN HEMTs. It is shown that the current slump is more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because the trapping effects become more significant. The drain lag could be a major cause of current slump in the case of higher off-state drain voltage. It is suggested that to minimize current slump in AlGaN/GaN HEMTs, an acceptor density in the buffer layer should be made low, although there may be a trade-off relationship between reducing current slump and obtaining sharp current cutoff.

URL: http://jjap.jsap.jp/link?JJAP/47/3428/
DOI: 10.1143/JJAP.47.3428
KEYWORDS:GaN, HEMT, trap, drain lag, gate lag, current slump, two-dimensional analysis


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