Jpn. J. Appl. Phys. 49 (2010) 04DE10 (5 pages)  |Previous Article| |Next Article|  |Table of Contents|
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Stable Readout Circuit for Ferroelectric Random Access Memory Using Complementary Metal–Oxide–Semiconductor-Inverter-Based Capacitive-Feedback Charge-Integration Scheme

Koji Kotani, Yohei Koshimoto, and Takashi Ito

(Received September 29, 2009; accepted November 17, 2009; published online April 20, 2010)

A capacitive-feedback charge-integration circuit composed of a simple complementary metal–oxide–semiconductor (CMOS) inverter amplifier was applied to a stable readout operation of a low-power low-voltage ferroelectric random access memory (FeRAM). Plate-line driving voltage can be fully applied to a ferroelectric capacitor, and readout signal voltage is independent of bitline capacitance owing to the negative feedback effect. Fluctuations in CMOS inverter amplifier characteristics can be compensated for by an autozeroing mechanism. A CMOS inverter amplifier operating point shift induced by a charge injection mechanism is very effective for increasing signal voltage amplitude. The circuit configuration and operation of the proposed scheme are very simple. A test circuit was fabricated and its operation was confirmed by measurement. The compensation for the threshold voltage fluctuation and the low-power operation of the proposed circuit were also demonstrated by simulation.

URL: http://jjap.jsap.jp/link?JJAP/49/04DE10/
DOI: 10.1143/JJAP.49.04DE10

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