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Low-Temperature Polycrystalline Silicon Thin Film Transistor Nonvolatile Memory Using Ni Nanocrystals as Charge-Trapping Centers Fabricated by Hydrogen Plasma Process

Terry Tai-Jui Wang, Pei-Ling Gao, William Cheng-Yu Ma¹, and Cheng-Tzu Kuo²

(Received November 30, 2009; accepted January 18, 2010; published online June 21, 2010)

Processes for fabricating a Ni nanocrystal (NC)-assisted low-temperature polycrystalline silicon thin film transistor (LTPS-TFT) nonvolatile memory device of noble stack below 600 °C were successfully developed. The NCs were fabricated in H-plasma atmosphere by heating a nanosized Ni film to realize an appropriate nanoparticle distribution. Results show that NCs with a number density of ∼5×10¹¹ cm^-2 and a particle diameter of 4 to 12 nm can successfully be fabricated as charge-trapping centers for enhancing the device performance. The results also indicate that the data retentions at the initial time and after 10⁴ s for a SiO₂/Ni-NCs/Si₃N₄/SiO₂ gate under the present stack of devices are about 2.2 and ∼1.1 V, respectively.

URL: http://jjap.jsap.jp/link?JJAP/49/06GG15/
DOI: 10.1143/JJAP.49.06GG15

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