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Multicore Large-Scale Integration Lifetime Extension by Negative Bias Temperature Instability Recovery-Based Self-Healing
1Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University, Kyoto 606-8501, Japan
2Department of Electronics, Graduate School of Science and Technology, Kyoto Institute of Technology, Kyoto 606-8585, Japan
3JST, CREST, Kawaguchi, Saitama 332-0012, Japan
(Received September 26, 2011; accepted December 12, 2011; published online April 20, 2012)
We propose a multicore large-scale integration (LSI) lifetime extension method, which is based on negative bias temperature instability (NBTI) recovery-based self-healing and circuit parallelization. NBTI recovery is characterized by the recently proposed NBTI sensor with 400 ns measurement delay that measures the off-leak current of p-channel metal–oxide–semiconductor (PMOS) transistors. The circuit is fabricated in a commercial 65 nm complementary MOS (CMOS) technology. It is found that the recoverable component of the LSI performance characterized by the off-leak current remains almost constant after repeatedly adding NBTI stress. The NBTI stress corresponds to circuit operation for several years at room temperature and a nominal operating voltage. It is also found that the amount of NBTI recovery can be tuned by the relaxation time in a real application, and it follows log
t from 400 ns to 3000 s. It is shown that for multicore LSI, by recovering one of the n + 1 cores, the n-core LSI system does not stop and the lifetime can be extended by NBTI recovery. For the first time, transforming silicon area into LSI reliability is shown to be a promising and realistic concept for the ever-shrinking CMOS technology.
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