Jpn. J. Appl. Phys. 51 (2012) 04DE05 (6 pages) |Previous Article| |Next Article| |Table of Contents|
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High Speed Frequency-Mapping-Based Associative Memory Using Compact Multi-Bit Encoders and a Path-Selecting Scheme
Seiryu Sasaki,
Masahiro Yasuda,
Akio Kawabata,
Tetsushi Koide, and
Hans Jürgen Mattausch
Research Institute for Nanodevice and Bio Systems, Hiroshima University, Higashihiroshima, Hiroshima 739-8527, Japan
(Received September 25, 2011; accepted December 24, 2011; published online April 20, 2012)
A compact multi-bit encoding concept for nearest-distance search-speed improvement of scalable and reliable associative-memories utilizing a mapping operation of the distances into frequency space is reported. The distance differences are transformed into signal delays which are finally detected with a time-domain winner-take-all (WTA) circuit. Ring oscillators programmable in discrete frequency steps are used for the distance–frequency mapping. This implementation enables to decrease the effects of process-induced variations, because the step size is a constraint-free design parameter. To further improve the search reliability, frequency dividers are used to enlarge the size of the frequency steps. The multi-bit encoder achieves a substantial search-time reduction by optimizing the basic-ring oscillator delay for distance zero with a path-selecting scheme. The proposed multi-bit encoding concept has been evaluated with two test-chip designs in 180 nm complementary metal oxide semiconductor (CMOS) technology. Search-time reductions by a factor 1.7 in typical search cases and a compact circuit implementation are verified.
URL:
http://jjap.jsap.jp/link?JJAP/51/04DE05/
DOI: 10.1143/JJAP.51.04DE05
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