Jpn. J. Appl. Phys. 19 (1980) Supplement 19-1 pp. 283-287  |Previous Article| |Next Article|  |Table of Contents|
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11th Conf. (1979 Int.) Solid State Devices, Tokyo, 1979

2 GHz, High Power Silicon SIT's

Toshio Shino, Hisao Kamo, Kiyoshi Aoki and Susumu Okano

Silicon SIT's (Static Induction Transistors) have been developed, which deliver a power output of 9.1 W (3.6 dB gain, 30% drain efficiency) at 2.1 GHz and 12 W (2.3 dB gain, 28% drain efficiency) at 2.0 GHz. A fine patterned structure of the SIT's was fabricated with the “washed gate” process and chemical dry etching technique. The structure to improve source-to-gate breakdown voltage was also adopted. The channel resistivity and the thickness of epitaxial layer were optimized for operations at around 2 GHz. An internal matching technique was applied to reduce the effects of matching circuit loss.

URL: http://jjap.jsap.jp/link?JJAPS/19S1/283/